Tag Archives: Micro-bump

Challenges with Wafer Probing on Fine-Pitch Micro-Bumps for 2.5D- and 3D-SICs

Posted on November 18, 2011 by Cascade Microtech Posted in Wafer

Recent advances in semiconductor processing technology enable the manufacturing of integrated circuits with Through-Silicon Vias (TSVs). TSV is a conducting “nail” that provides an electri… [View More]

Completing the Solution for Micro-bump / TSV Probing

Posted on October 24, 2011 by Cascade Microtech

Improved stepping accuracy: The first and most obvious requirement for micro-bump/TSV probing is for accurate die stepping. From our customers we estimate we should be prepared to probe at 40 um pitc… [View More]